Vice President of Manufacturing Engineering

The Vice President of Manufacturing Engineering is a high-impact executive role responsible for leading all manufacturing-facing engineering functions for complex semiconductor products. This leader will hold full ownership of advanced packaging, test engineering, process engineering, product engineering, reliability assurance, and New Product Introduction (NPI).

As the primary bridge between design, quality, and manufacturing, you will ensure seamless product transitions from initial development to high-volume production. This executive is directly accountable for global yield, quality, reliability, and cost optimization, while serving as the strategic interface to foundries, OSAT partners, and key customers for high-visibility silicon programs.

Executive Scope & Management

You will provide strategic oversight and leadership across the following core engineering disciplines:

• Package Engineering: Directing strategies for both traditional and advanced packaging architectures.

• Test Engineering: Managing ATE, probe, final test, and continuous yield improvement.

• Process Engineering: Overseeing wafer-level, backend, and assembly/test processes.

• Product Engineering: Leading characterization, silicon debug, and technical analysis.

• Reliability Assurance (RA): Driving qualification standards and long-term product integrity.

• NPI Management: Executing volume ramps and ensuring manufacturing readiness.

Key Responsibilities

Strategic Leadership & Organizational Growth

• Define and execute an engineering roadmap that supports manufacturing excellence and technological scalability.

• Build and mentor a world-class engineering organization, focusing on technical depth and disciplined execution.

• Establish and report on critical KPIs including yield, reliability, cycle time, and time-to-market.

Technical Strategy & Operations

• Packaging & Backend: Lead architectures for SiP, 2.5D/3D, Flip-Chip, and WLCSP; drive process transfers to global OSAT partners.

• Test & Yield: Oversee global test strategies across wafer probe and final test to optimize coverage, throughput, and cost.

• Product Quality: Own the end-to-end reliability qualification plans (JEDEC, automotive, or industrial) and drive root cause analysis for yield excursions.

• Design Collaboration: Work upstream with design teams to ensure strict alignment with DFM, DFT, and DFP principles.

NPI & External Partnership Management

• Lead all NPI activities, managing pilot builds, risk production, and high-volume ramps to ensure on-time delivery.

• Act as the primary executive engineering interface with global foundries and OSAT suppliers.

• Represent the engineering organization during strategic customer engagements, technical reviews, and audits.

Qualifications

• Academic Background: Bachelor’s degree in Electrical Engineering, Materials Science, Physics, or a related technical field.

• Industry Tenure: 15+ years within semiconductor engineering and manufacturing environments.

• Leadership Experience: Minimum 5–7 years in senior leadership roles (Director or VP level).

• Technical Mastery: Deep, hands-on expertise in packaging, test engineering, yield optimization, and high-volume manufacturing ramps.

Preferred Expertise

• Previous experience within a fabless semiconductor or ASIC design service environment.

• A proven track record of managing global manufacturing partners and OSATs across Asia.

• Direct experience supporting advanced technology nodes and complex SoC products.

• Exposure to the rigorous requirements of AI, automotive, or high-reliability industrial markets.