CAD Flow Engineer (AI driven implementation)

Key Responsibilities

• Develop and deploy AI-assisted implementation methodologies using Cadence Cerebrus to enhance design productivity and QoR.
• Integrate Cerebrus with RTL synthesis and physical implementation flows, enabling automated design space exploration and optimization.
• Analyze implementation results and apply machine-learning driven techniques to improve power, performance, and area (PPA).
• Collaborate closely with synthesis and APR teams to optimize implementation strategies and improve design convergence.
• Support advanced ASIC implementation flows, including low-power methodologies and physical-aware optimization techniques.
• Build and maintain automation frameworks and infrastructure through Tcl, Python, and Perl scripting.
• Evaluate new AI-driven EDA methodologies and drive continuous improvements in design efficiency and turnaround time.

Requirements

• Minimum 5 years of experience in ASIC design implementation, CAD methodology, or design automation.
• Hands-on experience with Cadence Cerebrus and strong understanding of AI-assisted EDA optimization methodologies.
• Solid experience with Cadence Genus and/or Innovus in synthesis and physical design environments.
• Good understanding of ASIC design flows, implementation methodologies, and low-power design techniques.
• Strong scripting capability in Tcl, Python, and Perl for flow automation and infrastructure development.
• Strong analytical and problem-solving skills with the ability to work independently and collaborate across design teams.
• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related disciplines.
• Ability to communicate effectively in English in a global engineering environment.