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MAKING SUCCESS STORIES HAPPEN
 

Confidential Semiconductor Company

We are seeking an experienced Package Design Engineer to join a leading semiconductor organization. This role will focus on advanced package design, simulation, manufacturability, and collaboration with internal teams, customers, and external manufacturing partners.

Key Responsibilities

  • Partner with design, layout, manufacturing, and customer teams to develop package solutions that meet performance, reliability, and manufacturing requirements.
  • Define package specifications from electrical, thermal, and mechanical perspectives.
  • Create and optimize package layouts using industry-standard design tools.
  • Perform package validation, design reviews, and support electrical simulation activities.
  • Ensure alignment and accuracy between die, package, and PCB interfaces.
  • Establish and maintain package design rules for technologies such as WLCSP, wire bond, and other advanced packaging solutions.
  • Apply Design for Manufacturability (DFM) principles to improve yield and reduce manufacturing risks.
  • Drive process improvements and automation within the package design flow.
  • Develop and evaluate test vehicles to assess package performance, bump placement, RDL structures, and PCB interaction effects.
  • Work closely with customers and manufacturing partners to troubleshoot and resolve package-related design issues.

Qualifications

Required

  • Bachelor's degree or higher in Mechanical Engineering, Electrical Engineering, Materials Science, Chemical Engineering, or a related field.
  • 5+ years of experience in semiconductor package design, package development, or a related engineering discipline.
  • Strong experience with Cadence SiP Layout and AutoCAD.
  • Solid understanding of semiconductor packaging technologies, materials, substrate design, and assembly processes.
  • Knowledge of package electrical performance and simulation fundamentals.
  • Familiarity with Unix/Linux environments and willingness to learn tools such as Cadence Virtuoso.
  • Excellent communication and presentation skills with the ability to engage customers, technical teams, and leadership.
  • Self-motivated with strong ownership, accountability, and problem-solving abilities.
  • Proven ability to collaborate effectively across multicultural and cross-functional teams.

Preferred

  • Experience with PCB and die layout tools such as Siemens Xpedition, Cadence Allegro PCB, or Cadence Virtuoso.
  • Knowledge of material properties and semiconductor package reliability considerations.
  • Experience with electrical simulation and signal integrity analysis.
  • Hands-on experience with Siemens Fast 3D.
  • Experience using Siemens Calibre DRC/DRV tools.
  • Strong curiosity and passion for learning new technologies and engineering methodologies.
Bewerben als Staff Package Design Engineer
Referenz: GC878443
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Staff Package Design Engineer
Taipei or Hsinchu, Northern Taiwan, Taiwan | Festanstellung