Principal SI/PI Engineer (DDR5, PCIE)

About the Role

We are partnering with a pioneering leader in high-speed connectivity solutions, delivering advanced chip, signaling, and system technologies that overcome traditional data transmission bottlenecks. As the industry pushes toward unprecedented bandwidth and energy efficiency, our client is expanding its engineering leadership.

We are seeking an accomplished Signal & Power Integrity (SI/PI) Engineer to join the team and play a pivotal role in shaping the future of high-speed serial links, advanced packaging, and system-level architectures.

Key Responsibilities

• SI/PI Analysis & Simulation: Perform and lead theoretical and simulation-based SI/PI analyses for PCB products, channels, test structures, and complex system implementations.

• Solution Architecture: Drive signal and power delivery solutions for PCBs, packages, and evaluation platforms in close collaboration with internal design teams.

• Silicon-to-System Co-Design: Work hand-in-hand with circuit designers to ensure robust SI/PI implementation directly in silicon.

• Cross-Functional Leadership: Partner with technology and product teams to guide SI/PI architecture, resolve system-level challenges, and optimize end-to-end link performance.

• Ecosystem Engagement: Collaborate with external customers and suppliers to define, evaluate, and validate hardware solutions, including packages, PCB/backplane layouts, materials, interposers, and connectors.

• Signaling Scheme Benchmarking: Evaluate and benchmark advanced signaling architectures—such as proprietary multi-level signaling and PAM—analyzing trade-offs across SI/PI performance, power consumption, and implementation complexity.

• Technical Communication: Prepare and present clear technical analyses, insights, and recommendations to internal stakeholders and external partners.

Required Experience & Qualifications

• Industry Experience: 12+ years of hands-on experience in the semiconductor industry with a core specialization in signal and power integrity.

• Educational Background: Master’s degree in Physics, Electronics, Electrical Engineering, or a related technical field.

• Electromagnetics Foundation: Strong theoretical foundation in electromagnetics and system-level design, encompassing material behavior across packages, PCBs, boards, connectors, and cables, alongside analog, power, and digital electronics.

• Problem Solving: Proven track record of resolving critical SI challenges through innovative connector, package, or cable designs.

• High-Speed Interfaces: Demonstrated experience with high-speed standards such as DDR5 and PCIe.

• Tool Proficiency: Familiarity with Cadence board layout environments and industry-standard SI/PI toolsets.

• Collaboration: Excellent cross-functional communication skills with a collaborative, proactive, and analytical mindset.

Technical Skills

• Deep expertise in SI/PI design and simulation across multiple abstraction levels—from EM modeling to system-level link behavior.

• Hands-on proficiency with EM/SI/PI tools and modeling flows, including calibration, correlation, and lab validation.

• Practical lab measurement experience utilizing VNAs, spectrum analyzers, and high-speed real-time/sampling oscilloscopes.

• Strong engineering intuition regarding EM simulation trade-offs (accuracy, runtime, model complexity, and design impact).

• Expertise in channel modeling and extraction for multi-Gbps systems, accounting for comprehensive end-to-end link considerations.

• Proficiency in Linux-based design environments and scripting languages for modeling automation and efficiency.

Preferred Qualifications

• Specialized experience with DDR5 interface analysis, routing rules, and channel optimization.

• Proven experience with PCIe channel design, equalization, and hardware validation.

• Hands-on mastery of Cadence design suites, including Allegro, Sigrity, and Clarity 3D.

• Exposure to advanced PCB layout techniques tailored for high-density, server-class systems.

• Exceptional technical writing and presentation skills for high-level design reviews and customer-facing discussions.