RD Design Manager
Posted on: 03/07/2026
Hsinchu Northern Taiwan
Permanent
Semiconductor
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Design Domain Expertise: Advanced mastery in Analog, Digital, and Mixed-Signal IC design.
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EDA Tools & Infrastructure:
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Simulation & Verification: Verilog, HSPICE, Spectre, Finesim, Cosim, Ultrasim.
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Physical Layout & Logic Design: Cadence, Synopsys, Virtuoso, Laker, ICFB, WV, nWave.
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Programming & Scripting Languages:
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Mandatory: Unix shell, C/C++, Perl, Skill, or TCL.
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Preferred: Python alongside general automation scripting competencies.
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🌟 Executive Summary
We are seeking a high-caliber technical leader to fill a critical management position. This role is dedicated to orchestrating the end-to-end silicon lifecycle, guiding products seamlessly from early conceptual stages through to high-volume manufacturing. The position requires an intricate integration of profound technical knowledge in advanced circuit design, coupled with structured project management and team-steering capabilities.
🎯 Preferred Credentials & Strategic Attributes
Priority will be given to candidates who possess the following specialized qualifications and personal traits:
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Domain Specialization: Deep and comprehensive familiarity with DRAM architecture, industry standards, and memory technology.
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Hands-on Training: Practical background with TSRI (Taiwan Semiconductor Research Institute) advanced IC design training and verified Tape-out experience.
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Intellectual Property: A proven record of holding IC design patents or publishing peer-reviewed IEEE journal papers.
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Language Proficiency: Professional fluency in English (excellent listening, speaking, reading, and writing skills) for cross-border collaboration.
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Soft Skills & Competencies: Meticulous attention to engineering detail, a strong sense of project ownership, proactive stakeholder management, and exceptional problem-solving agility.
📋 Key Responsibilities & Leadership Scope
The chosen manager will take full ownership of technical execution, operational optimization, and personnel development:
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Workflow Engineering & Standardization: Construct robust, standardized IC design flows and formulate rigorous execution schedules to actively neutralize project delay risks.
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Cross-Functional Synchronization: Serve as the primary technical link aligning engineering designs with Project Management (PM), Manufacturing operations, and Testing/Validation departments to ensure smooth mass production.
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Advanced R&D & IP Creation: Direct and oversee comprehensive mixed-signal, digital, and analog IC designs; personally resolve architectural bottlenecks and generate new patent applications.
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Technical Operations Management: Oversee full-chip timing closure activities, manage complex database integrations, and supervise post-silicon debugging/validation operations.
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Talent Cultivation: Strategy-map specialized training initiatives, champion an engineering culture of continuous upskilling, and actively elevate the team’s overall technical capability.
🎓 Background & Experience Thresholds
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Advanced Node Experience: A minimum of 7 years of deep, hands-on CMOS design experience specifically utilizing advanced technology nodes.
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Industry Longevity: 5 to 10 years of solid professional experience directly within analog or digital IC design environments.
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Academic Prerequisites: Master’s degree or PhD in Electrical Engineering, Computer Engineering, or an equivalent technical field of study.
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Lifecycle Competence: Thorough understanding of the complete IC development cycle—from the initial design architecture and validation phases to final high-volume manufacturing.
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Project Leadership: A proven track record of successfully managing and delivering complex product R&D initiatives.