Principal PCIE / CXL Driver Engineer

Key Responsibilities

• Driver Architecture & Maintenance: Design, implement, and maintain a high-performance, custom Linux downstream kernel driver for cutting-edge PCIe and CXL switch devices (covering enumeration, configuration, and hot-plug).

• AI Ecosystem Integration: Extend and interface low-level drivers with CUDA driver infrastructure, GPUDirect, and/or PyTorch Dynamo / torch.compile pipelines to seamlessly expose CXL memory and switch topology to demanding AI workloads.

• System Topology Optimization: Collaborate closely with the hardware and system validation teams to ensure accurate NUMA topology exposure and robust cache-coherency semantics.

Required Qualifications

Kernel & Hardware Architecture

• Core Experience: 8+ years of professional experience in Linux kernel driver development with a track record of writing production-quality, mainline-compatible code.

• PCIe Subsystem Expertise: Deep, internal-level expertise in the Linux PCIe subsystem, including enumeration, BAR mapping, MSI/MSI-X, IOMMU, and Linux DMA APIs.

• CXL Specifications: Solid theoretical and practical understanding of CXL 2.0/3.0 specifications, specifically regarding CXL.mem and fabric management concepts.

• Memory & Coherency: Deep familiarity with Linux kernel memory management subsystems, NUMA topology architecture, and cache-coherent interconnect semantics.

Engineering & Diagnostics

• Programming: Mastery of C programming for complex, low-level systems.

• Hardware-Level Debugging: Proven experience diagnosing and debugging intricate hardware/software interaction defects using logic analyzers, PCIe protocol analyzers, JTAG, or similar hardware diagnostic tools.

• Mindset: Outstanding analytical problem-solving skills paired with a proactive, execution-driven professional attitude.

Value-Add Experience (Preferred)

• Open Source Upstreaming: Active contributions to the upstream Linux kernel (ideally within the PCIe, CXL, or ACPI subsystems).

• Kernel Maintenance: Experience with downstream Linux kernel tree maintenance (cherry-picking, backporting, and complex patch management across LTS branches).

• Advanced GPU Computing: Hands-on experience with the CUDA driver model, GPUDirect RDMA, or NVLink topologies from a kernel or system software perspective.

• AI Compilers: Familiarity with PyTorch internals, machine learning compilers, or execution graph frameworks.

• Switch ASIC & Fabric Management: Experience with switch ASIC driver development (Ethernet, PCIe, or CXL) at a tier-1 semiconductor vendor, or exposure to CXL Fabric Management software/FM APIs.

• Agility: Prior experience thriving in high-impact, fast-paced startup environments.

Communications & Collaboration

• Language Proficiency: Excellent written and verbal English communication skills, with the ability to articulate complex architectural concepts clearly.

• Cross-Site Synergy: Proven ability to collaborate effectively across multidisciplinary, cross-functional, and globally distributed engineering teams.