CAD Flow Engineer

Key Responsibilities

• Architect, develop, and continuously enhance RTL-to-gate synthesis methodologies with a strong focus on physical-aware implementation using Cadence Genus.
• Partner with front-end and back-end design teams to deploy synthesis best practices, provide technical consultation, and drive methodology adoption across projects.
• Improve timing closure efficiency through advanced optimization techniques, path analysis, and close collaboration with APR teams to achieve optimal PPA results.
• Establish robust synthesis-to-place-and-route correlation strategies, ensuring design quality through signoff validation processes such as LEC and CLP.
• Develop and maintain automation frameworks, scripts, and infrastructure to streamline design execution, increase productivity, and shorten turnaround time.

Requirements

• Extensive experience in CAD/EDA methodology development with a focus on digital synthesis flows.
• Strong hands-on expertise in Cadence Genus, including physical-aware synthesis, timing optimization, and constraint management.
• Proven experience driving synthesis-to-APR convergence, correlation analysis, and signoff quality closure.
• Proficiency in Linux environments and automation scripting using Tcl, Python, and Perl.
• Strong communication and stakeholder management skills, with the ability to support multiple design teams and promote process improvements.
• Exposure to AI-driven design automation, LLM-based copilots, or agentic AI applications for EDA workflow optimization is highly desirable.