34 Semiconductor jobs in Northern Taiwan

【The Opportunity】 We are seeking a high-caliber Customer Program Manager (CPM) to drive the execution and delivery of next-generation PC customer design-in programs and SoC partner engagements. This is a high-impact role acting as the operational bridge between Tier-1 PC OEMs, strategic SoC partners, and i...

Position: Technical Marketing Manager - Motor Driver  Location: HsinChu  Job Description:  1.Market Intelligence & Roadmap Definition: Research market trends and competitors, identify opportunities and pain points, and define next-gen motor driver IC specs with R&D. 2.Go-To-Market & Business Devel...

Position Overview Reporting directly to the Executive Management (Head of Operations / General Manager), the Head of Global Quality will oversee and strategize the comprehensive Quality Management System (QMS) for our global product portfolio, encompassing IoT Memory, AI/HPC High-Bandwidth Memory, and 3D S...

【Job Responsibilities】 Customer Relations & Quality Assurance : Lead customer service initiatives, manage client audits, and spearhead customer complaint investigations and resolutions. Supplier Quality Management : Oversee supplier quality engineering performance and drive the rigorous ...

【Job Responsibilities】 Collaborate with the Design & Development and Design Verification departments to develop and introduce new packaging processes. Partner with the Production department to resolve packaging anomalies and maintain stable manufacturing yields. Establish and ...

【先進製程】Senior APR Engineer_台北/新竹 Responsibilities  Lead full Netlist-to-GDSII implementation flow, including Floorplan, Placement, CTS, Routing, and Physical Optimization.   Drive timing closure, IR/EM analysis, DRC/LVS sign-off, and tape-out readiness.   Resolve advanced n...

工作職責與內容 系統晶片整合： 負責高階 SoC 上層模組之連線架構設計與系統級晶片整合（System-level Integration）工作。 硬體模擬與原型驗證： 熟練運用 FPGA 進行模組及系統級功能驗證，並協同 Firmware/Software 團隊主導完成 Prototype 系統原型測試。 ASIC 前端設計流程： 獨立主導 ASIC 前端開發流程，包含邏輯綜合（Synthesis）、可測試性設計（DFT）、跨時鐘域（CDC）分析及時序收斂（Timing Closure）。 後段實體設計協同： ...

前沿技術挑戰 ：參與高難度數位電路演算法研發，直接挑戰系統極限速度。 綠色晶片推手 ：專注於 Low-Power（低功耗、低電壓）與面積優化（Area Reduction）的核心技術改良。 全方位發展 ：從前期產品規格規劃、演算法研究，到後端合成分析，提供完整的全流程（Full-Flow）發揮舞台。 Key Responsibilities 產品規劃與創新 ：規劃積體電路（IC）產品架構，並主導開發創新的應用功能。 演算法研究與優化 ：深入研究數位電路演算法，進行架構設計與優化，以滿足系統對高效...

Key Responsibilities Netlist-to-GDS Ownership: Lead the digital backend physical implementation from netlist to GDS, driving the complete chip sign-off and closure process. Full-Chip Floorplanning: Execute comprehensive full-chip floorplanning, including chip partitioning, power and g...